Composite electronic device and digital transmission circuit using thereof

ABSTRACT

A composite electronic device includes first and second magnetic substrates, and a functional layer sandwiched between these magnetic substrates, and the functional layer is configured by a common-mode filter layer and a ESD protection element layer. An electrostatic capacitance of the ESD protection elements is equal to or lower than 0.35 pF. The common-mode filter layer includes a first spiral conductor formed on an insulation layer, and a second spiral conductor formed on an insulation layer. DC resistance of a common mode filter is equal to or higher than 0.5Ω and equal to or lower than 5Ω, and an electrostatic capacitance of the ESD protection elements is equal to or lower than 0.35 pF. A width W and a length L of the first and second spiral conductors satisfy a relational equation expressed by √(L/W)&lt;(7.6651−fc)/0.1385.

TECHNICAL FIELD

The present invention relates to a composite electronic device, and moreparticularly relates to a composite electronic device configured bycombining electrostatic discharge (ESD) protection elements. The presentinvention also relates to a digital transmission circuit, and moreparticularly relates to a digital transmission circuit configured byusing ESD protection elements and a common-mode filter.

BACKGROUND OF THE INVENTION

In recent years, standards of USB 2.0 and a high-definition multimediainterface (HDMI) have been widely distributed as high-speed signaltransmission interfaces, and they are used in many digital devices suchas personal computers and digital high-vision televisions. Theseinterfaces employ a differential signal system that transmits adifferential signal (a differential mode signal) by using a pair ofsignal lines, unlike a single-end transmission system that has beengenerally used for many years.

The differential transmission system has excellent characteristics inthat the system is not easily affected by exogenous noise as well asthat the system has a small radiation electromagnetic field generatedfrom the signal lines, as compared with the single-end transmissionsystem. Therefore, a signal can have small amplitude, and the system canperform a higher-speed signal transmission than the single-endtransmission system, by shortening arise time and a fall time based onthe small amplitude.

FIG. 11 is a circuit diagram of a general differential transmissioncircuit.

The differential transmission circuit shown in FIG. 11 includes a pairof signal lines 1 and 2, an output buffer 3 that supplies a differentialmode signal to the signal lines 1 and 2, and an input buffer 4 thatreceives a differential mode signal from the signal lines 1 and 2. Inthis configuration, an input signal IN given to the output buffer 3 istransmitted to the input buffer 4 via the pair of signal lines 1 and 2,and is reproduced as an output signal OUT. This differentialtransmission circuit has a characteristic that a radiationelectromagnetic field generated from the signal lines 1 and 2 is small,as described above. However, this circuit generates a relatively largeradiation electromagnetic field when common noise (common mode noise) issuperimposed on the signal lines 1 and 2. To decrease the radiationelectromagnetic field generated by the common mode noise, it iseffective to insert a common-mode choke coil 5 into the signal lines 1and 2, as shown in FIG. 11.

The common-mode choke coil 5 has characteristics that impedance to adifferential component (a differential mode signal) transmitted throughthe signal lines 1 and 2 is low and that impedance to an in-phasecomponent (common mode noise) is high. Therefore, by inserting thecommon-mode choke coil 5 into the signal lines 1 and 2, common modenoise transmitted through the pair of signal lines 1 and 2 can beinterrupted without substantially attenuating the differential modesignal.

In a latest high-speed digital interface such as an HDMI, an IC verysensitive to static electricity is used because the interface handles afine signal of a high transmission rate. Accordingly, ESD (electrostaticdischarge) becomes a large problem. To prevent destruction of the IC dueto ESD, a varistor is used as an ESD countermeasure device between thesignal lines and a base. However, when the varistor is used, a signalwaveform becomes inert, and signal quality is degraded. Therefore, alower-capacitance ESD countermeasure device is required. For example, asshown in FIG. 12, Japanese Patent Application Laid-open No. 2008-28214proposes an ESD protection circuit having an electrostatic capacitanceof an ESD protection device 9 set to 0.3 pF or lower, by connecting acoil 8 in series on signal lines 7 connected to an IC 6 and byconnecting the ESD protection device 9 between each signal line 7 andthe ground (see FIG. 8 of Japanese Patent Application Laid-open No.2008-28214).

Japanese Patent Application Laid-open No. 2007-214166 discloses astructure having a voltage-dependency resistance material having an ESDprotection function provided on an uppermost part of a compositeelectronic device accommodating a common-mode noise filter and the ESDprotection function in one package. According to this structure, thevoltage-dependency resistance material can be provided after sintering alaminated body containing many insulation layers. With this arrangement,it is possible to prevent reduction of the ESD protection function dueto oxidation and cracking of the voltage-dependency resistance materialat a sintering time. Consequently, the ESD protection function can beimproved.

Furthermore, Japanese Patent Application Laid-open No. 2006-261585discloses a common mode filter including first and second coilconductors electromagnetically coupled to each other, and having asatisfactory high-frequency characteristic by arranging that a relationbetween a cutoff frequency fc of the common mode filter and a conductorwidth W and a total length L of the first coil conductor satisfyrelational equation expressed by √(L/W)<(7.6651−fc)/0.1385.

In a conventional circuit configuration shown in FIG. 12, it ispreferable that the protection voltage of the IC 6 is as high aspossible. The protection voltage in this case means a voltage at whichthe IC 6 is broken. For example, it is known that a conventional circuitconfigured by combining a general varistor of 6 pF as a ESD protectionelement and a common mode filter can secure a protection voltage of 5kV. However, as described above, because the varistor has a largeelectrostatic capacitance and its signal quality is degraded, a circuitcapable of obtaining a protection voltage equal to or higher than thatof a varistor while minimizing the electrostatic capacitance has beendesired.

In the common mode filter described in Japanese Patent ApplicationLaid-open No. 2007-214166, the voltage-dependency resistance materialconstituting ESD protection elements contains a resin. Therefore, theESD protection elements need to be provided on the uppermost part due toa constraint of a manufacturing step which becomes a large constraint ondesign. The voltage-dependency resistance material is filled into a veryfine gap of about 10 μm. At the uppermost part, an uneven area is largein a plane surface due to a structure that many insulation layers formedwith conductor patterns are laminated. Consequently, it is considerablydifficult to stably form a very fine gap. Further, in forming the ESDprotection elements on a top layer, the manufacturing step becomescomplex, and manufacturing cost increases.

SUMMARY OF THE INVENTION

Therefore, an object of the present invention is to provide a compositeelectronic device configured by combining ESD protection elements havinga smaller electrostatic capacitance than that of a varistor and anexcellent discharge characteristic and a common mode filter, and capableof obtaining a protection voltage equal to or higher than 5 kV.

Another object of the present invention is to provide a high-speeddigital transmission circuit configured by combining ESD protectionelements having a smaller electrostatic capacitance than that of avaristor, an excellent discharge characteristic, and enhanced heatresistance and weatherability and a common mode filter, and capable ofobtaining a protection voltage equal to or higher than 5 kV.

As a result of intensive studies to achieve the above objects, theinventor(s) of the present invention has found that a protection voltageequal to or higher than 5 kV can be obtained by setting DC resistance ofa common mode filter to equal to or higher than 0.5Ω in a compositeelectronic device obtained by combining common-mode filter elements andESD protection elements.

The present invention has been achieved based on the technical findingsdescribed above. A composite electronic device according to the presentinvention includes ESD protection elements absorbing overvoltage causedby electrostatic discharge and a common-mode filter element connected tothe ESD protection elements. An electrostatic capacitance of each of theESD protection elements is equal to or lower than 0.35 pF, and DCresistance of the common-mode filter element is equal to or higher than0.5Ω.

According to the present invention, a protection voltage equal to orhigher than 5 kV can be secured for an IC connected to a latter stage ofa composite electronic device. Further, the present invention canprovide an ESD protection function having a smaller electrostaticcapacitance than that of a varistor and having an excellent dischargecharacteristic.

In the present invention, common-mode filter element includes first andsecond spiral conductors that are magnetically coupled to each other andarranged in superimposition in a laminating direction. The thickness ofeach of the first and second spiral conductors is equal to or smallerthan 10 μm. It is preferable that a width W and a length L of the firstand second spiral conductors satisfy a relational equation expressed by√(L/W)<(7.6651−fc)/0.1385, when a cutoff frequency of differential modenoise is fc (MHz).

As far as a common mode filter according to the present inventionsatisfies the relational equation mentioned above, a protection voltageequal to or higher than 5 kV can be secured while maintaining a normaloperation of the common mode filter in a high-frequency band of a 800MHz band.

In the present invention, common-mode filter elements and ESD protectionelements are provided between two magnetic substrates. The ESDprotection elements include a base insulation layer, electrodes mutuallyoppositely arranged via gaps on the base insulation layer, and astatic-electricity absorbing layer arranged at least between theelectrodes. The static-electricity absorbing layer is a composite havinga conductive inorganic material discontinuously dispersed in a matrix ofan insulation inorganic material.

According to this configuration, the composite electronic deviceincludes low-voltage discharge-type ESD protection elements having avery small electrostatic capacitance, a low discharge starting voltage,and excellent discharge resistance. Therefore, the composite electronicdevice can transmit a signal equivalent to a signal having no ESDprotection, and can suppress reduction of characteristic impedance.Furthermore, because a composite of an insulation inorganic material anda conductive inorganic material is configured as a static-electricityprotection material, pressure resistance can be remarkably increased,and weatherability in external environments such as temperature andhumidity can be remarkably increased. Further, because inductor elementsand ESD protection elements are formed in one chip, a very compact andhigh-performance electronic device can be provided.

In the present specification, “composite” means a state that aconductive inorganic material is dispersed in a matrix of an insulationinorganic material. This is a concept including not only a state that aconductive inorganic material is dispersed uniformly or at random in amatrix of an insulation inorganic material but also a state that anaggregate of a conductive inorganic material is dispersed in a matrix ofan insulation inorganic material, that is, a state generally called asea-island structure. In the present specification, “insulation” meansresistance that is equal to or higher than 0.1 Ωcm, and “conductivity”means resistance that is lower than 0.1 Ωcm. So-called“semiconductivity” is included in the former so long as specificresistance thereof is equal to or higher than 0.1 Ωcm.

In the present invention, a insulation inorganic material is preferablyat least one kind selected from a group of Al₂O₃, TiO₂, SiO₂, ZnO,In₂O₃, NiO, CoO, SnO₂, V₂O₅, CuO, MgO, ZrO₂, AlN, BN, and SiC. Becausethese metal oxides are excellent in insulation, heat resistance, andweatherability, these metal oxides function effectively as materialsconstituting an insulation matrix of a composite. As a result, it ispossible to realize highly-functional ESD protection elements havingexcellent discharge characteristic, heat resistance, and weatherability.Because these metal oxides are obtainable at a low cost and because asputtering method can be applied to these metal oxides, productivity andeconomics can be increased.

In the present invention, a conductive inorganic material is preferablyat least one kind of metal or a metal compound of these metals selectedfrom a group of C, Ni, Cu, Au, Ti, Cr, Ag, Pd, and Pt. By compoundingthese metals or a metal compound in a state of a discontinuousdispersion in a matrix of an insulation inorganic material,highly-functional ESD protection elements having excellent dischargecharacteristic, heat resistance, and weatherability can be realized.

It is preferable that the first and second spiral conductors have acurved line shape. When the first and second spiral conductors have acircular spiral shape, a total length of these conductors can be setshorter than that of the conductors having a rectangular spiral shape.With this arrangement, a cutoff frequency of differential mode noise ofthe common mode filter can be set higher, thereby achieving a compositeelectronic device having higher performance.

The above objects of the present invention can be also achieved by adigital transmission circuit including a pair of signal lines, asemiconductor IC chip connected to the pair of signal lines, ESDprotection elements provided at a pre-stage of the semiconductor IC chipon the pair of signal lines, and a common mode filter provided betweenthe ESD protection elements and the semiconductor IC chip on the pair ofsignal lines, where an electrostatic capacitance of each of the ESDprotection elements is equal to or lower than 0.35 pF, and DC resistanceof the common mode filter is equal to or higher than 0.5Ω.

According to the present invention, a protection voltage equal to orhigher than 5 kV can be secured for the semiconductor IC chip. Thepresent invention can also provide a high-speed digital transmissioncircuit having an ESD protection function with a smaller electrostaticcapacitance than that of a varistor and with an excellent dischargecharacteristic. Further, because the ESD protection elements arearranged at the pre-stage of the common mode filter, an overvoltage dueto static electricity can be reflected at an input end of the commonmode filter. The ESD protection elements can absorb at once theovervoltage generated due to an increased voltage as a result ofsuperimposition of a reflection signal. Therefore, absorption efficiencyof an overvoltage by the ESD protection elements can be increased.

The present invention can provide a composite electronic deviceconfigured by combining ESD protection elements having a smallelectrostatic capacitance, an excellent discharge characteristic, andexcellent heat resistance and weatherability and a common mode filter,and capable of obtaining a protection voltage equal to or higher than 5kV.

The present invention can also provide a high-speed digital transmissioncircuit configured by ESD protection elements having a smallelectrostatic capacitance and an excellent discharge characteristic anda common mode filter, and capable of obtaining a protection voltageequal to or higher than 5 kV.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other objects, features and advantages of this inventionwill become more apparent by reference to the following detaileddescription of the invention taken in conjunction with the accompanyingdrawings, wherein:

FIG. 1 is a schematic perspective view showing an external configurationof a composite electronic device according to a first embodiment of thepresent invention;

FIG. 2 is a circuit diagram showing a configuration of the compositeelectronic device 100;

FIG. 3 is a schematic exploded perspective view showing one example of alayer structure of the composite electronic device 100;

FIG. 4 is a schematic plan view showing a positional relationshipbetween the gap electrodes 28 and 29 and other conductor patterns;

FIG. 5A is a schematic plan view showing one example of a layerstructure near the first gap electrode 28 in the ESD protection layer 12b;

FIG. 5B is a schematic cross-sectional view showing one example of alayer structure near the first gap electrode 28 in the ESD protectionlayer 12 b;

FIG. 6 is a schematic view for explaining a principle of the ESDprotection elements;

FIG. 7 is a flowchart showing a manufacturing step of the compositeelectronic device;

FIG. 8 is a schematic exploded perspective view showing a configurationof a composite electronic device according to a second embodiment of thepresent invention;

FIG. 9A is a schematic block diagram showing a configuration of ahigh-speed digital transmission circuit according to a preferredembodiment of the present invention;

FIG. 9B is a schematic block diagrams showing another configuration of ahigh-speed digital transmission circuit according to a preferredembodiment of the present invention;

FIG. 10 is a graph showing a protection voltage of each of the aboveexamples and corresponding comparative examples;

FIG. 11 is a circuit diagram of a general differential transmissioncircuit; and

FIG. 12 is a circuit diagram showing a conventional ESD countermeasurecircuit.

DETAILED DESCRIPTION OF THE EMBODIMENTS

Preferred embodiments of the present invention will be explained belowin detail with reference to the accompanying drawings.

FIG. 1 is a schematic perspective view showing an external configurationof a composite electronic device according to a first embodiment of thepresent invention.

As shown in FIG. 1, a composite electronic device 100 according to thisembodiment is a thin-film common mode filter having an ESD protectionfunction, and includes first and second magnetic substrates 11 a and 11b, and a function layer 12 sandwiched between the first magneticsubstrate 11 a and the second magnetic substrate 11 b. First to sixthterminal electrodes 13 a to 13 f are formed on an external peripheralcircuit of a laminated body constituted by the first magnetic substrate11 a, the function layer 12, and the second magnetic substrate 11 b. Thefirst and second terminal electrodes 13 a and 13 b are formed on a firstside surface 10 a. The third and fourth terminal electrodes 13 c and 13d are formed on a second side surface 10 b opposite to the first sidesurface 10 a. The fifth terminal electrode 13 e is formed on a thirdside surface 10 c orthogonal with the first and second side surfaces 10a and 10 b. The sixth terminal electrode 13 f is formed on a fourth sidesurface 10 d opposite to the third side surface.

The first and second magnetic substrates 11 a and 11 b physicallyprotect the function layer 12, and serve as a closed magnetic path ofthe common mode filter. Sintered ferrite, composite ferrite (a resincontaining powdery ferrite), and the like can be used as materials ofthe first and second magnetic substrates 11 a and 11 b. The first andsecond magnetic substrates 11 a and 11 b of the present embodiment mayhave a single layer structure or a multilayer structure.

FIG. 2 is a circuit diagram showing a configuration of the compositeelectronic device 100.

As shown in FIG. 2, the composite electronic device 100 includesinductor elements 14 a and 14 b functioning as a common-mode choke coil,and ESD protection elements 15 a and 15 b. One ends of the inductorelements 14 a and 14 b are connected to the first and second terminalelectrodes 13 a and 13 b, respectively, and the other ends of theinductor elements 14 a and 14 b are connected to the third and fourthterminal electrodes 13 c and 13 d, respectively. One ends of the ESDprotection elements 15 a and 15 b are connected to the first and secondterminal electrodes 13 a and 13 b, respectively, and the other ends ofthe ESD protection elements 15 a and 15 b are connected to the fifth andsixth terminal electrodes 13 e and 13 f, respectively. As shown in FIG.13, the composite electronic device 100 is mounted on a pair of signallines. In this case, the first and second terminal electrodes 13 a and13 b are connected to the input side of the signal lines, and the thirdand fourth terminal electrodes 13 c and 13 d are connected to an outputside of the signal lines. The fifth and sixth terminal electrodes 13 eand 13 f are connected to a base line.

FIG. 3 is a schematic exploded perspective view showing one example of alayer structure of the composite electronic device 100.

As shown in FIG. 3, the composite electronic device 100 includes thefirst and second magnetic substrates 11 a and 11 b, and the functionlayer 12 sandwiched between the first and second magnetic substrates 11a and 11 b. The function layer 12 is constituted by a common-mode filterlayer 12 a and an ESD protection layer 12 b.

The common-mode filter layer 12 a includes insulation layers 16 a to 16e, a magnetic layer 16 f, an adhesive layer 16 g, a first spiralconductor 17 formed on the insulation layer 16 b, a second spiralconductor 18 formed on the insulation layer 16 c, a first lead conductor19 formed on the insulation layer 16 a, and a second lead conductor 20formed on the insulation layer 16 d.

The insulation layers 16 a to 16 e insulate between conductor patterns,or conductor patterns and the magnetic layer 16 f, and function tosecure the flatness of a base surface on which the conductor patternsare formed. For materials of the insulation layers 16 a to 16 e, it ispreferable to use a resin excellent in electric and magnetic insulationand having a good workability. Preferably, a polyimide resin and anepoxy resin are used. Preferably, Cu, Al and the like excellent inconductivity and workability are used for conductor patterns. Theconductor patterns can be formed by an etching method and an additivemethod (plating) using photolithography.

An opening 25 piercing through the insulation layers 16 b to 16 e isprovided at an interior portion of the first and second spiralconductors 17 and 18 as center regions of the insulation layers 16 b to16 e. A magnetic substance 26 to form a closed path is filled intobetween the first magnetic substrate 11 a and the second magneticsubstrate 11 b, within the opening 25. A composite ferrite and the likeare preferably used for the magnetic substance 26.

The magnetic layer 16 f is formed on a surface of the insulation layer16 e. The magnetic substance 26 within the opening 25 is formed bycuring a paste of composite ferrite (a resin containing a magneticpowder). At a curing time, the resin is contracted, and unevennessoccurs at an opening portion. To decrease this unevenness, it ispreferable to coat the paste on a whole surface of the insulation layer16 e as well as the interior portion of the opening 25. The magneticlayer 16 f is formed to secure this flatness.

The adhesive layer 16 g is a layer necessary to bond the magneticsubstrate 11 b onto the magnetic layer 16 f. The adhesive layer 16 galso functions to suppress the unevenness of the surfaces of themagnetic substrate 11 b and the magnetic layer 16 f, and increasingclose adhesiveness. While not particularly limited, an epoxy resin, apolyimide resin, and a polyamide resin can be used as materials of theadhesive layer 16 g.

The first spiral conductor 17 corresponds to the inductor element 14 ashown in FIG. 2. An internal peripheral end of the first spiralconductor 17 is connected to the first terminal electrode 13 a via afirst contact hole conductor 21 and the first lead conductor 19 piercingthrough the insulation layer 16 b. An external peripheral end of thefirst spiral conductor 17 is connected to the third terminal electrode13 c via a third lead conductor 23.

The second spiral conductor 18 corresponds to the inductor element 14 bshown in FIG. 2. An internal peripheral end of the second spiralconductor 18 is connected to the second terminal electrode 13 b via asecond contact-hole conductor 22 and the second lead conductor 20piercing through the insulation layer 16 d. An external peripheral endof the second spiral conductor 18 is connected to the fourth terminalelectrode 13 d via a fourth lead conductor 24.

The first and second spiral conductors 17 and 18 have the same planesurface shape, and are provided at the same position as a planar view.The first and second spiral conductors 17 and 18 are completelyoverlapped with each other, and therefore, a strong magnetic couplingoccurs between the first and second spiral conductors 17 and 18. Basedon the above configuration, conductor patterns within the common-modefilter layer 12 a constitute a common mode filter.

To normally operate the common mode filter in a desired transmissionfrequency, a cutoff frequency fc (MHz) of differential mode noise needsto be set to about three to five times of the desired transmissionfrequency. For example, to normally operate the common mode filter whena transmission frequency is 800 MHz, the cutoff frequency fc (MHz) needsto be set to about 2.4 GHz to 4 GHz. For the common-mode filter elementsto satisfy the condition described above, a width W and a length L ofthe first and second spiral conductors 17 and 18 need to satisfy therelational equation (1).√(L/W)<(7.6651−fc)/0.1385  (1)The length L of the spiral conductors is a total length from the insideof a spiral to an external end of the spiral.

Meanwhile, DC resistance of the common mode filer is set equal to orhigher than 0.5Ω and equal to or lower than 5Ω. This is because when theDC resistance of the common mode filer is equal to or higher than 0.5Ω,a protection voltage equal to or higher than 5 kV can be obtained in theIC at a latter stage. A conventional circuit configured by combining avaristor of 6 pF that is a general ESD protection element and a commonmode filter is known to be able to secure a protection voltage of 5 kV.The present invention can also provide an ESD protection functioncapable of obtaining a protection voltage equivalent to this, and havinga smaller electrostatic capacitance than that of a varistor and havingan excellent discharge characteristic. The reason for setting the DCresistance equal to or lower than 5Ω is to prevent reduction of thecutoff frequency fc of differential mode noise.

It is particularly preferable that DC resistance of the common modefilter is equal to or higher than 1Ω and equal to or lower than 3Ω. Thisis because when the DC resistance is equal to or higher than 1Ω, aprotection voltage equal to or higher than 7 kV can be obtained in theIC at a latter stage, and because a protection voltage exceeding that ofthe conventional circuit configured by combining a varistor of 6 pF anda common mode filter can be obtained. The reason for setting the DCresistance equal to or lower than 3Ω is to securely prevent reduction ofthe cutoff frequency fc of the differential mode noise described above.

To set the DC resistance of the common mode filter to equal to or higherthan 0.5Ω, it suffices that a conductor width of the first and secondspiral conductors 17 and 18 within the common-mode filter layer 12 a isset small, a conductor width is set small, and the number of turns ofthe spirals is increased. However, it is not preferable to decrease theconductor width of the first and second spiral conductors 17 and 18 orto increase the number of turns of the spirals. This is because theshape of the spiral conductor does not satisfy the above relationalequation of a cutoff frequency. Therefore, to set the DC resistance toequal to or higher than 0.5Ω while satisfying the above relationalequation, it is effective to decrease the thickness of the spiralconductors 17 and 18. It is preferable that the thickness of the firstand second spiral conductors 17 and 18 is equal to or smaller than 10μm. When the thickness of the spiral conductors is equal to or smallerthan 10 μm, the above relational equation can be satisfied in thetransmission frequency of 800 MHz.

The ESD protection element layer 12 b includes a base insulation layer27, first and second gap electrodes 28 and 29 formed on a surface of thebase insulation layer 27, and a ESD absorbing layer 30 covering thefirst and second gap electrodes 28 and 29. A layer structure near thefirst gap electrode 28 is a portion functioning as the first ESDprotection element 15 a shown in FIG. 2, and a layer structure near thesecond gap electrode 29 is a portion functioning as the second ESDprotection element 15 b. One end of the first gap electrode 28 isconnected to the first terminal electrode 13 a, and the other end of thefirst gap electrode 28 is connected to the fifth terminal electrode 13e. One end of the second gap electrode 29 is connected to the secondterminal electrode 13 b, and the other end of the second gap electrode29 is connected to the sixth terminal electrode 13 f.

FIG. 4 is a schematic plan view showing a positional relationshipbetween the gap electrodes 28 and 29 and other conductor patterns.

As shown in FIG. 4, gaps 28G and 29G held by the gap electrodes 28 and29 are provided at positions not overlapped on the plane with the firstand second spiral conductors 17 and 18 and the first and second leadconductors 19 and 20 constituting the common mode filter. Although notparticularly limited, in the first embodiment, the gaps 28G and 29G areprovided in an open region between the spiral conductors 17 and 18 andthe opening 25 at the inside of the spiral conductors 17 and 18. Whiledetails thereof are described later, because ESD protection elements arepartially damaged or deformed due to absorption of ESD, conductorpatterns have a risk of being damaged at the same time when theconductor patterns are arranged at a position overlapped with the ESDprotection elements. However, because the gaps 28G and 29G of the ESDprotection elements are provided at positions deviated from theconductive patterns, influence to upper and lower layers can besuppressed when the ESD protection elements are partially destroyed byESD, and a composite electronic device having higher reliability can berealized.

FIGS. 5A and 5B are examples of a layer structure near the first gapelectrode 28 in the ESD protection layer 12 b, where FIG. 5A is aschematic plan view and FIG. 5B is a schematic cross-sectional view. Aconfiguration of the second gap electrode 29 is the same as that of thefirst gap electrode 28, and therefore redundant explanations will beomitted.

The ESD protection layer 12 b includes the base insulation layer 27formed on a surface of the magnetic substrate 11 a, a pair of theelectrodes 28 a and 28 b constituting the first gap electrode 28, andthe ESD absorbing layer 30 arranged between the electrodes 28 a and 28b. In this ESD protection layer 12 b, the ESD absorbing layer 30functions as a low-voltage discharge type ESD protection material. TheESD absorbing layer 30 is designed to secure initial discharge betweenthe electrodes 28 a and 28 b via the ESD absorbing layer 30 when anovervoltage of ESD is applied.

The base insulation layer 27 is made of an insulation material. In thefirst embodiment, the base insulation layer 27 covers a whole surface ofthe magnetic substrate 11 a from easiness of manufacturing. However, thebase insulation layer 27 does not need to cover the whole surface whenthe base insulation layer 27 is at least a base of the electrodes 28 aand 28 b and the ESD absorbing layer 30.

As a detailed example of the base insulation layer 27, there can besuitably used a substance obtained by forming an insulation film made ofa low-dielectric-constant material having a dielectric constant equal toor lower than 50, preferably equal to or lower than 20, of NiZn ferrite,aluminum, silica, magnesia, and aluminum nitride, on the surface of thefirst magnetic substrate 11 a. A method of forming the base insulationlayer 27 is not particularly limited, and a known method can be appliedsuch as a vacuum deposition method, a reactive deposition method, asputtering method, an ion plating method, and a gas phase method such asCVD and PVD. A film thickness of the base insulation layer 27 can besuitably set.

A pair of the electrodes 28 a and 28 b is arranged with a distance fromeach other on the surface of the base insulation layer 27. In the firstembodiment, the pair of the electrodes 28 a and 28 b is arrangedopposite to each other with a gap distance ΔG at a predeterminedposition on the base insulation layer 27.

As materials constituting the electrodes 28 a and 28 b, there can bementioned at least one kind of metal or an alloy of metals selected fromNi, Cr, Al, Pd, Ti, Cu, Ag, Au, and Pt, for example. However, metals arenot particularly limited thereto. In the first embodiment, while theelectrodes 28 a and 28 b are formed in a rectangular shape as a planarview, the shape is not particularly limited thereto, and can be acomb-teeth shape or a saw-teeth shape.

The gap distance ΔG between the electrodes 28 a and 28 b can be suitablyset by considering a desired discharge characteristic. Although notparticularly limited, the gap distance ΔG is usually about 0.1 to 50 μm.From the viewpoint of securing low-voltage initial discharge, the gapdistance ΔG is more preferably about 0.1 to 20 μm, and furtherpreferably about 0.1 to 10 μm. A thickness of the electrodes 28 a and 28b can be suitably set, and it is usually about 0.05 to 10 μm althoughnot particularly limited thereto.

The ESD absorbing layer 30 is arranged between the electrodes 28 a and28 b. In the first embodiment, the ESD absorbing layer 30 is laminatedon the surface of the base insulation layer 27 and on the electrodes 28a and 28 b. A size and a shape and a layout position of the ESDabsorbing layer 30 are not particularly limited so long as the ESDabsorbing layer 30 is designed to secure initial discharge between theelectrodes 28 a and 28 b via the self when an overvoltage is applied.

The ESD absorbing layer 30 is a composite of a sea-island structurehaving an aggregate of a conductive inorganic material 33 disperseddiscontinuously in a matrix of an insulation inorganic material 32. Inthe first embodiment, the ESD absorbing layer 30 is formed bysequentially performing sputtering. Specifically, the conductiveinorganic material 33 is partially (incompletely) filmed by sputtering,on at least one of an insulation surface of the base insulation layer 27and the electrodes 28 a and 28 b. Thereafter, the insulation inorganicmaterial 32 is sputtered, thereby forming a composite of a laminatingstructure of a layer of the conductive inorganic material 33 dispersedin a so-called island shape and a layer of the insulation inorganicmaterial 32 covering the layer of the conductive inorganic material 33.

As an example of the insulation inorganic material 32 constituting amatrix, a metal oxide and a metal nitride can be mentioned, but thematerial is not limited thereto. Considering insulation and costs,Al₂O₃, TiO₂, SiO₂, ZnO, In₂O₃, NiO, CoO, SnO₂, V₂O₅, CuO, MgO, ZrO₂,AlN, BN, and SiC are preferable. Either one kind or two or more kinds ofthese materials can be used. Among these materials, from the viewpointof giving high insulation to an insulation matrix, Al₂O₃ or SiO₂ is morepreferably used. On the other hand, from the viewpoint of givingsemiconductivity to the insulation matrix, TiO₂ or ZnO is morepreferably used. When semiconductivity is given to the insulationmatrix, ESD protection elements having excellent discharge startingvoltage and clamp voltage can be obtained. While a method of givingsemiconductivity to the insulation matrix is not particularly limited,TiO₂ or ZnO can be used as a single material, or these materials can beused together with other insulation inorganic material 32. Particularly,TiO₂ has oxygen easily lost at the time of sputtering in an argonatmosphere, and electric conductivity tends to become high. Therefore,it is particularly preferable to use TiO₂ to give semiconductivity tothe insulation matrix. The insulation inorganic material 32 alsofunctions as a protection layer that protects the pair of the electrodes28 a and 28 b and the conductive inorganic material 33 from an optionallayer (for example, the insulation layer 16 a) positioned on an upperlayer.

As an example of the conductive inorganic material 33, a metal, analloy, a metal oxide, a metal nitride, a metal carbide, and a metalboride can be mentioned. However, the conductive inorganic material 33is not limited to these materials. Considering conductivity, C, Ni, Cu,Au, Ti, Cr, Ag, Pd, and Pt, or an alloy of these materials arepreferable.

A combination of Cu, SiO₂, and Au is particularly preferable for acombination of the electrode 28, the insulation inorganic material 32,and the conductive inorganic material 33 configuring the ESD absorbinglayer 30. ESD protection elements constituted by these materials are notonly excellent in an electric characteristic but also are extremelyadvantageous in workability and costs. Particularly, a composite of asea-island structure having an aggregate of the conductive inorganicmaterial 33 of an island shape dispersed discontinuously can be formedin high precision and easily.

A total thickness of the ESD absorbing layer 30 is not particularlylimited and can be suitably set. From the viewpoint of achieving athinner film, the total thickness is preferably 10 nm to 10 μm. Morepreferably, the total thickness is 15 nm to 1 μm, and furtherpreferably, it is 15 to 500 nm. In forming a layer of the conductiveinorganic material 33 of an island shape dispersed discontinuously and alayer of the matrix of the insulation inorganic material 32 like in thefirst embodiment, a thickness of the layer of the conductive inorganicmaterial 33 is preferably 1 to 10 nm, and the thickness of the layer ofthe insulation inorganic material 32 is preferably 10 nm to 10 μm, morepreferably 10 nm to 1 μm, and further preferably 10 to 500 nm.

A method of forming the ESD absorbing layer 30 is not limited to thesputtering method described above. The ESD absorbing layer 30 can beformed by giving the insulation inorganic material 32 and the conductiveinorganic material 33 onto at least one of the insulation surface of thebase insulation layer 27 and the electrodes 28 a and 28 b, by applying aknown thin-film forming method.

In the ESD protection layer 12 b of the first embodiment, the ESDabsorbing layer 30 containing the island-shape conductive inorganicmaterial 33 dispersed discontinuously in the matrix of the insulationinorganic material 32 functions as a low-voltage discharge type ESDprotection material. By employing this configuration, it is possible torealize high-performance ESD protection elements having a smallelectrostatic capacitance, a low discharge starting voltage, andexcellent discharge resistance. For the ESD absorbing layer 30functioning as a low-voltage discharge type ESD protection material, acomposite constituted by at least the insulation inorganic material 32and the conductive inorganic material 33 is employed. Therefore, heatresistance is increased as compared with that of the conventionalorganic-inorganic composite film described above, and a characteristicdoes not easily vary due to external environments such as temperatureand humidity. As a result, reliability is increased. The ESD absorbinglayer can be formed by a sputtering method. Accordingly, productivityand economics are more increased. The ESD protection elements in thefirst embodiment can be configured such that the ESD absorbing layer 30contains an element configuring the electrodes 28 a and 28 b bypartially dispersing the electrodes 28 a and 28 b in the ESD absorbinglayer 30 by applying a voltage to between the electrodes 28 a and 28 b.

FIG. 6 is a schematic view for explaining a principle of the ESDprotection elements.

As shown in FIG. 6, when a discharge voltage based on ESD is applied tobetween a pair of the electrodes 28 a and 28 b, the discharge currentflows from the electrode 28 a toward the electrode 28 b (ground) passingthrough an optional route constituted by the island-shape conductiveinorganic material 33 discontinuously dispersed in the matrix of theinsulation inorganic material 32 as shown by arrowheads. In this case,the conductive inorganic material 33 at a ground point having a largeconcentration of energy in the current route is destroyed together withthe insulation inorganic material 32, and discharge energy of ESD isabsorbed. Although a destroyed route becomes nonconductive, ESD can beabsorbed at plural times because many current routes are formed by theisland-shape conductive inorganic material 33 discontinuously dispersed,as shown in FIG. 6.

As explained above, the composite electronic device 100 according to thefirst embodiment includes low-voltage type ESD protection elementshaving a small electrostatic capacitance, a low discharge startingvoltage, and excellent discharge resistance, heat resistance, andweatherability. Therefore, a composite electronic device functioning asa common mode filter including a high-performance ESD protectionfunction can be realized.

According to the first embodiment, the insulation inorganic material 32and the conductive inorganic material 33 are used as materials of theESD protection layer 12 b. Because a resin is not contained in variousmaterials configuring the ESD protection layer 12 b, the ESD protectionlayer 12 b can be formed on the magnetic substrate 11 a, and thecommon-mode filter layer 12 a can be formed on the ESD protection layer12 b. To form the common-mode filter layer 12 a by a so-called thin-filmforming method, a heat processing step at 350° C. or above is necessary.To form the common-mode filter layer 12 a by a so-called layerlaminating method of sequentially laminating ceramic sheets formed withconductor patterns, a heat processing step at 800° C. is necessary.However, when the insulation inorganic material 32 and the conductiveinorganic material 33 are used as materials of the ESD protection layer,the materials can bear the heat processing step, and ESD protectionelements functioning normally can be formed. The ESD protection elementscan be formed on a sufficiently flat surface on a magnetic substrate,and a fine gap of gap electrodes can be stably formed.

According to the first embodiment, formation positions of the gapelectrodes are not overlapped on a plane surface with the first andsecond spiral conductors configuring the common mode filter, and the gapelectrodes are provided at positions deviating from the conductorpatterns. Therefore, influence to upper and lower directions can besuppressed when the ESD protection elements are partially destroyed byESD, and a composite electronic device having higher reliability can berealized.

According to the first embodiment, as shown in FIG. 2, the compositeelectronic device 100 is mounted on the pair of signal lines, and theESD protection elements 15 a and 15 b are provided nearer to the inputside of the signal lines than to the common mode filter 14 a. Therefore,absorption efficiency of an overvoltage of the ESD protection elementscan be increased. Usually, an overvoltage of ESD is an abnormal voltagehaving no balance in impedance matching, and therefore, is oncereflected at an input end of the common mode filter. This reflectionsignal is superimposed with an original signal waveform. A signal of anincreased voltage is absorbed at once by the ESD protection elements.That is, a common mode filter at a latter stage of the ESD protectionelements increases a size of the waveform to larger than that of theoriginal waveform. Therefore, it is possible to generate a state thatthe signal can be more easily absorbed by the ESD protection elementsthan when the signal is absorbed in a state of a low voltage level. Byinputting a once-absorbed signal into the common mode filter in thisway, fine noise can be removed.

Furthermore, according to the present embodiment, DC resistance of thecommon-mode filter elements is set equal to or higher than 0.5Ω.Therefore, a high-performance ESD protection function having aprotection voltage equal to or higher than 5 kV for the IC connected tothe latter stage can be provided.

A method of manufacturing the composite electronic device 100 accordingto the first embodiment is explained in detail next.

FIG. 7 is a flowchart showing a manufacturing step of the compositeelectronic device.

In the method of manufacturing the composite electronic device 100, thefirst magnetic substrate 11 a is first prepared (Step S101), the ESDprotection layer 12 b is formed on the surface of the first magneticsubstrate 11 a (Steps S102 to S104), and the common-mode filter layer 12a is formed on the surface of the ESD protection layer 12 b (Steps S105to S111). The second magnetic substrate 11 b is laminated (Step S112).Thereafter, the terminal electrodes 13 a to 13 f are formed on theexternal peripheral surface (Step S113), thereby completing thecomposite electronic device 100 having the common-mode filter layer 12 aand the ESD protection layer 12 b sandwiched between the first andsecond magnetic substrates 11 a and 11 b.

The method of manufacturing the composite electronic device 100according to the first embodiment is used to consistently form thecommon-mode filter layer 12 a and the ESD protection layer 12 b by thethin-film forming method. The thin-film forming method is a method offorming a multi-layer film having insulation layers and conductor layersalternately formed, by forming insulation layers by coating aphotosensitive resin, exposing and developing this layer, and thereafterby repeating a step of forming conductor patterns on a surface of theinsulation layers. A step of forming the ESD protection layer 12 b andthe common-mode filter layer 12 a is explained in detail below.

In the formation of the ESD protection layer 12 b, the base insulationlayer 27 is first formed on the surface of the magnetic substrate 11 a(Step S102). A method of forming the base insulation layer 27 is notparticularly limited, and a known method can be applied such as a vacuumdeposition method, a reactive deposition method, a sputtering method, anion plating method, and a gas phase method such as CVD and PVD. A filmthickness of the base insulation layer 27 can be suitably set.

The gap electrodes 28 and 29 are formed on the surface of the baseinsulation layer 27 (Step S103). The gap electrodes 28 and 29 can beformed by forming a film of an electrode material on the whole surfaceof the base insulation layer 27, and thereafter by patterning theelectrode material. Because the gap distance ΔG between the pair ofelectrodes is very fine like about 0.1 to 50 μm, a high-precisionpatterning is required, and flatness of the base surface is alsorequired. The base insulation layer 27 is formed on the magneticsubstrate 11 a having high flatness. Because the base insulation layer27 has high flatness, a fine gap width can be controlled in highprecision.

The ESD absorbing layer 30 is formed on the surface of the baseinsulation layer 27 on which the gap electrodes 28 and 29 are formed(Step S104). Specifically, the conductive inorganic material 33 ispartially (incompletely) filmed by sputtering, on at least one of theinsulation surface of the base insulation layer 27 and the electrodes 28a and 28 b. Thereafter, the insulation inorganic material 32 issputtered, thereby forming a composite of a laminating structure of alayer of the conductive inorganic material 33 dispersed in an islandshape and a layer of the insulation inorganic material 32 covering thelayer of the conductive inorganic material 33. As a result, the ESDprotection layer 12 b is completed.

In the formation of the common-mode filter layer 12 a, insulation layersand conductor patterns are alternately formed, thereby forming theinsulation layers 16 a to 16 e, the first and second spiral conductors17 and 18, and the first and second lead conductors 19 and 20 (StepsS105 to S109). Specifically, after the insulation layer 16 a is formedon the ESD protection layer 12 b, the first lead conductor 19 is formedon the insulation layer 16 a (Step S105). Next, after the insulationlayer 16 b is formed on the insulation layer 16 a, the first spiralconductor 17 is formed on the insulation layer 16 b, and a contact hole21 piercing through the insulation layer 16 b is formed (Step S106).After the insulation layer 16 c is formed on the insulation layer 16 b,the second spiral conductor 18 is formed on the insulation layer 16 c(Step S107). Next, after the insulation layer 16 d is formed on theinsulation layer 16 c, the second lead conductor 20 is formed on theinsulation layer 16 d, and the contact hole 22 piercing through theinsulation layer 16 d is formed (Step S108). Further, the insulationlayer 16 e is formed on the insulation layer 16 d (Step S109).

The insulation layers 16 a to 16 e can be formed by spin coating aphotosensitive resin on the base surface, and by exposing and developingthe photosensitive resin. Particularly, the insulation layers 16 b to 16e can be formed as insulation layers having the opening 25. Conductorpatterns such as spiral conductors can be formed by forming a conductorlayer by a deposition method or by a sputtering method, and thereafterby patterning the conductor layer. The conductive layer at this timeneeds to have a thickness set in advance to satisfy the above relationalequation. The spiral conductor formed by patterning the conductive layeralso needs to have a width set in advance to satisfy the aboverelational equation (1).

The magnetic substance 26 is filled into the opening 25, and themagnetic layer 16 f is formed on the surface of the insulation layer 16e as well (Step S110). Thereafter, the adhesive layer 16 g is formed(Step S111), and the second magnetic substrate 11 b is bonded via theadhesive layer 16 g (Step S112). The terminal electrodes 13 a to 13 fare formed on an external peripheral surface of a laminated body (StepS113), thereby completing the composite electronic device 100.

As explained above, the method of manufacturing a composite electronicdevice according to the first embodiment is a thin-film forming methodfor consistently forming the ESD protection layer 12 b and thecommon-mode filter layer 12 a. Therefore, the composite electronicdevice can be manufactured without via a special manufacturing step. Themethod of manufacturing a composite electronic device according to thefirst embodiment is for forming the ESD protection layer 12 b on themagnetic substrate 11 a, and forming the common-mode filter layer 12 aon the ESD protection layer 12 b. Therefore, the ESD protection elementscan be formed on the surface of the magnetic substrate 11 a having arelatively flat surface, and a composite electronic device havingcombined high-quality ESD protection elements and a common-mode filtercan be manufactured.

FIG. 8 is a schematic exploded perspective view showing a configurationof a composite electronic device according to a second embodiment of thepresent invention.

As shown in FIG. 8, a composite electronic device 200 according to thisembodiment is characterized in that the shape of the first and secondspiral conductors 17 and 18 is not a rectangular spiral pattern, but acurved spiral pattern (a circular spiral pattern). The spiral conductors17 and 18 do not need to have a curve in its entirety, and is sufficientto have only partly a curved shape such as a corner portion in a curvedshape. When the first and second spiral conductors 17 and 18 have acircular spiral shape, the total length of the spiral conductors can beshorter than that when these spiral conductors have a rectangular spiralshape. Accordingly, a cutoff frequency of differential mode noise of thecommon mode filter can be set higher. On the other hand, when the totallength of the spiral conductors 17 and 18 becomes short, DC resistancedecreases. Therefore, in the case of the circular spiral shape, athickness of the conductors needs to be smaller. Other configurations ofthe composite electronic device 200 are identical to those of thecomposite electronic device 100 according to the first embodiment.Therefore, elements having the same configurations are denoted by likereference numerals, and detailed explanations thereof will be omitted.

As explained above, according to the second embodiment, because thefirst and second spiral conductors 17 and 18 have a circular spiralshape, a cutoff frequency of differential mode noise of the common modefilter can be set higher, thereby achieving a composite electronicdevice having higher performance. In the case of a circular spiralshape, gap electrodes can be easily formed in an open space not formedwith its pattern.

A high-speed digital transmission circuit according to a preferredembodiment is explained next.

FIGS. 9A and 9B are schematic block diagrams showing a configuration ofa high-speed digital transmission circuit according to a preferredembodiment of the present invention.

A high-speed digital transmission circuit 300 shown in FIG. 9A uses thecomposite electronic device 100 according to the first embodiment, andincludes a pair of signal lines 7 a and 7 b formed on a printedsubstrate, a connector 7 c connected to one ends of the pair of signallines 7 a and 7 b, an IC 6 connected to the other ends of the pair ofsignal lines 7 a and 7 b, and the composite electronic device 100provided between the connector 7 c and the IC 6 on the pair of signallines. Needless to mention, the composite electronic device 200according to the second embodiment can be used instead of the compositeelectronic device 100.

The first and second terminal electrodes 13 a and 13 b of the compositeelectronic device 100 are connected to signal lines at the connector 7 cside, and the third and fourth terminal electrodes 13 c and 13 d areconnected to signal lines at the IC 6 side. The fifth and sixth terminalelectrodes 13 e and 13 f are connected to a ground line. It ispreferable that the composite electronic device 100 is directlyconnected to the connector 7 c via only the signal lines 7 a and 7 b,and also directly connected to the IC 6.

As explained above, in the high-speed digital transmission circuit 300,an electrostatic capacitance of the ESD protection element layer 12 bincluded in the composite electronic device 100 is equal to or lowerthan 0.35 pF, and DC resistance of the common-mode filter layer 12 a isequal to or higher than 0.5Ω. Therefore, the high-speed digitaltransmission circuit 300 can secure a protection voltage equal to orhigher than 5 kV for the IC 6 at the latter stage. Further, thehigh-speed digital transmission circuit 300 can provide a ESD protectionfunction having a smaller electrostatic capacitance than that of avaristor, an excellent discharge characteristic, and increased heatresistance and weatherability.

In the high-speed digital transmission circuit 300 according to thepresent embodiment, because the ESD protection element layer 12 b isprovided at an input side (connector 7 c side) of the common-mode filterlayer 12 a, absorption efficiency of an overvoltage by the ESDprotection elements can be improved. Static electricity entering fromthe connector 7 c is absorbed by the ESD protection element layer 12 b,but is not completely absorbed, and a part of the static electricityflows to the IC 6 side. However, because the overvoltage due toelectrostatic discharge is an abnormal voltage not impedance-matched,the overvoltage is reflected by an input end of the common-mode filterlayer 12 a provided at the latter stage of the ESD protection elementlayer 12 b. This reflection signal is superimposed with the originalsignal waveform, and a signal of an increased voltage is absorbed atonce by the ESD protection element layer 12 b. That is, the common modefilter at the latter stage of the ESD protection elements changes thewaveform to a larger waveform than the original waveform. Consequently,the ESD protection elements generate a state of more easily absorbingthe signal than absorbing the signal at a low voltage level. In thisway, by inputting the once-absorbed signal to the common mode filter,fine noise can be removed.

On the other hand, a high-speed digital transmission circuit 400 shownin FIG. 9B does not use the composite electronic device 100 according tothe first embodiment, but is configured by using a common mode filterand ESD protection elements made of separate chip parts. That is, thehigh-speed digital transmission circuit 400 includes the pair of signallines 7 a and 7 b formed on a printed substrate, the connector 7 cconnected to one ends of the pair of signal lines 7 a and 7 b, the IC 6connected to the other ends of the pair of signal lines 7 a and 7 b, acommon mode filter 40 provided between the connector 7 c and the IC 6 onthe pair of signal lines 7 a and 7 b, and ESD protection elements 41 aand 41 b provided at a pre-stage of the common mode filter 40.

The common mode filter 40 is the common-mode filter layer 12 a of thecomposite electronic device 100 in the first embodiment configured as anindependent chip part. DC resistance of the common mode filter 40 isequal to or higher than 0.5Ω and equal to or lower than 5Ω, and is morepreferably equal to or higher than 1Ω and equal to or lower than 3Ω. TheESD protection elements 41 a and 41 b are the ESD protection elementlayer 12 b of the composite electronic device 100 according to the firstembodiment configured as an independent chip part. An electrostaticcapacitance of the ESD protection elements 41 a and 41 b is equal to orlower than 0.35 pF. Configurations of the common mode filter 40 and theESD protection elements 41 a and 41 b are as explained above withreference to FIGS. 3 to 5, and thus detailed explanations thereof willbe omitted.

As explained above, in the high-speed digital transmission circuit 400,the electrostatic capacitance of the ESD protection elements 41 a and 41b is also equal to or lower than 0.35 pF, and DC resistance of thecommon mode filter 40 is also equal to or higher than 0.5Ω. Therefore,the high-speed digital transmission circuit 400 can secure a protectionvoltage equal to or higher than 5 kV for the IC 6 at the latter stage.Further, the high-speed digital transmission circuit 400 can provide anESD protection function having a smaller electrostatic capacitance thanthat of a varistor, an excellent discharge characteristic, and increasedheat resistance and weatherability.

Furthermore, in the high-speed digital transmission circuit 400according to the present embodiment, because the ESD protection elements41 a and 41 b are provided at an input side (connector 7 c side) of thecommon mode filter 40, absorption efficiency of an overvoltage by theESD protection elements can be increased. Static electricity enteringfrom the connector 7 c is absorbed by the ESD protection elements 41 aand 41 b, but is not completely absorbed, and a part of the staticelectricity flows to the IC 6 side. However, because the overvoltage dueto electrostatic discharge is an abnormal voltage not impedance-matched,the overvoltage is reflected by an input end of the common mode filter40 provided at the latter stage of the ESD protection elements 41 a and41 b. This reflection signal is superimposed with the original signalwaveform, and a signal of an increased voltage is absorbed at once bythe ESD protection element layer 12 b. That is, the common mode filterat the latter stage of the ESD protection elements changes the waveformto a larger waveform than the original waveform. Consequently, the ESDprotection elements generate a state of more easily absorbing the signalthan absorbing the signal at a low voltage level. In this way, byinputting the once-absorbed signal to the common mode filter, fine noisecan be removed.

While preferred embodiments of the present invention have been explainedabove, the present invention is not limited thereto. Variousmodifications can be made to the embodiments without departing from thescope of the present invention and it is needless to say that suchmodifications are also embraced within the scope of the invention.

For example, in the first and second embodiments, although the ESDprotection element layer 12 b is a lower layer and the common-modefilter layer 12 a is an upper layer, the ESD protection element layer 12b can be an upper layer and the common-mode filter layer 12 a can be alower layer. In this case, because the ESD protection element layer 12 bis formed on an upper surface of the common-mode filter layer 12 a, theupper surface of the common-mode filter layer 12 a needs to have asufficient flatness.

EXAMPLES

There were prepared a sample A1 of a high-speed digital transmissioncircuit configured by using a composite electronic device having DCresistance of 0.5Ω in a common mode filter, and a sample A2 of ahigh-speed digital transmission circuit configured by using a compositeelectronic device having DC resistance of 1.1Ω in a common mode filter.The configuration of the high-speed digital transmission circuit is asshown in FIG. 9A. A breaking state of an IC was confirmed by applying apredetermined pulse voltage from a connector. As a result, in the sampleA1, the IC was broken when a pulse voltage was about 5 kV, and aprotection voltage of the IC at this time was about 5 kV. In the sampleA2, the IC was broken when a pulse voltage was about 7 kV, and aprotection voltage of the IC at this time was about 7 kV.

On the other hand, there were prepared a comparative sample B1 of ahigh-speed digital transmission circuit configured by combining avaristor having an electrostatic capacitance of 3 pF and a common modefilter, and a comparative sample B2 of a high-speed digital transmissioncircuit configured by combining a varistor having an electrostaticcapacitance of 6 pF and a common mode filter. A breaking state of an ICwas confirmed by applying a predetermined pulse voltage from aconnector. As a result, in the comparative sample B1, a protectionvoltage of the IC was about 3 kV. In the comparative sample B2, aprotection voltage of the IC was about 5 kV.

FIG. 10 is a graph showing a protection voltage of each of the aboveexamples and corresponding comparative examples.

As shown in FIG. 10, it is clear that a protection voltage of thecomposite electronic device (the Sample A1) using a common mode filterhaving DC resistance of 0.5Ω is equivalent to a protection voltage ofthe combination (the comparative sample B2) of a varistor having 6 pFand a common mode filter. A protection voltage of the compositeelectronic device (the Sample A2) using a common mode filter having DCresistance 1.1Ω exceeds a protection voltage of the comparative sampleB2.

1. A composite electronic device comprising: ESD protection elementsabsorbing electrostatic discharge; and a common-mode filter elementconnected to the ESD protection elements, wherein an electrostaticcapacitance of the ESD protection elements is equal to or lower than0.35 pF, and DC resistance of the common-mode filter element is equal toor higher than 0.5Ω.
 2. The composite electronic device as claimed inclaim 1, wherein the common-mode filter element includes first andsecond spiral conductors that are magnetically coupled to each other andarranged in superimposition in a laminating direction, the thickness ofeach of the first and second spiral conductors is equal to or smallerthan 10 μm, and a width W and a length L of the first and second spiralconductors and a cutoff frequency fc (MHz) of differential mode noisesatisfy a relational equation expressed by √(L/W)<(7.6651−fc)/0.1385. 3.The composite electronic device as claimed in claim 2, wherein the firstand second spiral conductors have a curved line shape.
 4. The compositeelectronic device as claimed in claim 2, wherein the ESD protectionelements include first and second ESD protection elements, one end ofthe first spiral conductor is connected to the first ESD protectionelement, and one end of the second spiral conductor is connected to thesecond ESD protection element.
 5. The composite electronic device asclaimed in claim 1, wherein the ESD protection elements include a baseinsulation layer, electrodes mutually oppositely arranged via gaps onthe base insulation layer, and a static-electricity absorbing layerarranged at least between the electrodes, and the static-electricityabsorbing layer is a composite having a conductive inorganic materialdiscontinuously dispersed in a matrix of an insulation inorganicmaterial.
 6. The composite electronic device as claimed in claim 5,wherein the insulation inorganic material is at least one kind selectedfrom a group of Al₂O₃, TiO₂, SiO₂, ZnO, In₂O₃, NiO, CoO, SnO₂, V₂O₅,CuO, MgO, ZrO₂, AlN, BN, and SiC.
 7. The composite electronic device asclaimed in claim 5, wherein the conductive inorganic material is atleast one kind of metal or a metal compound of these metals selectedfrom a group of C, Ni, Cu, Au, Ti, Cr, Ag, Pd, and Pt.
 8. The compositeelectronic device as claimed in claim 1, further comprising: first andsecond magnetic substrates; and a functional layer sandwiched betweenthe first magnetic substrate and the second magnetic substrate, whereinthe functional layer includes the ESD protection element and thecommon-mode filter element.
 9. A digital transmission circuitcomprising: a pair of signal lines; a semiconductor IC chip connected tothe pair of signal lines; ESD protection elements provided at apre-stage of the semiconductor IC chip on the pair of signal lines; anda common mode filter provided between the ESD protection elements andthe semiconductor IC chip on the pair of signal lines, wherein anelectrostatic capacitance of each of the ESD protection elements isequal to or lower than 0.35 pF, and DC resistance of the common modefilter is equal to or higher than 0.5Ω.